Raising FPGA Logic Density Through Synthesis-Inspired Architecture

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Logic Synthesis for Cellular Architecture FPGA using BDD

Gueesang Lee Dept. of Computer Science The Chonnam National University Kwangju, Korea (Tel)082-62-520-6895, (FAX)082-62-524-0020 e-mail [email protected] Abstract| In this paper, an e cient approach to the synthesis of CA(Cellular Architecture)-type FPGAs is presented. To exploit the array structure of cells in CA-type FPGAs, logic expressions called Maitra terms, which can be mapped ...

متن کامل

FPGA Architecture for Multi-Style Asynchronous Logic

This paper presents a novel FPGA architecture for implementing various styles of asynchronous logic. The main objective is to break the dependency between the FPGA architecture dedicated to asynchronous logic and the logic style. The innovative aspects of the architecture are described. Moreover the structure is well suited to be rebuilt and adapted to fit with further asynchronous logic evolut...

متن کامل

Digit-serial Reconfigurable Fpga Logic Block Architecture

This paper presents a novel eld-programmable gate array logic block architecture which incorporates support for digit-serial DSP architectures on a digit wide basis, without diminishing the support for random and control logic applications. To eeciently realize a digit-serial DSP design on FPGAs, one must create an FPGA architecture optimized for those types of systems. Key to the suitability o...

متن کامل

FPGA Logic Synthesis Using Quantified Boolean Satisfiability

This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit and describes how this problem can be formalized and solved using Quantified Boolean Satisfiability. This technique is general enough to be applied to any type of logic function and programmable circuit; thus, it has ...

متن کامل

Analysis of Technology Mapping Algorithm for Logic optimization of Symmetrical FPGA Architecture through Hybrid LUTs/PLAs

Reconfigurable computing using Field Programmable Devices (FPD) provides a method to utilize the available logic resources on the chip for various computations. The basic ability of reconfigurable computing is to perform computations in hardware to increase performance, while retaining the flexibility of application software. The purpose of this paper is to analysis the effect of technology map...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

سال: 2012

ISSN: 1063-8210,1557-9999

DOI: 10.1109/tvlsi.2010.2102781